Biography
Biography: Abu Asaduzzaman
Abstract
Multicore architectures suffer from high core-to-core communication latency due to the traditional wire based network and power-hungry cache’s unpredictable behavior. As the number of cores increases, managing the requests from many cores and satisfying the large number of requests as quickly as possible becomes a critical challenge. Studies suggest that a directory with the information about Level-1 Cache (CL1) blocks can be helpful in order to reduce the communication latency. The recently introduced wireless router in network-on-a-chip shows promise by efficiently handling many requests, simultaneously, faster and cheaper (consuming less energy). Therefore, we introduce a Level-2 Cache Mediator (L2CM) and a hybrid network (with wired and wireless routers) into a multicore/many-core system to improve system scalability. The proposed L2CM should have enough memory to store information about CL1 cached blocks, CL1 victim blocks, etc., and a wireless router for low-power fast communication with Central Processing Unit (CPU) cores. According to the experimental results, (considering communication delay and power consumption) the proposed architecture is better than mesh multicasting for all cases and is better than or as good as wireless network-on-a-chip. Experimental results suggest that the proposed L2CM may decrease the communication delay by up to 63% and the total power consumption by up to 33%.